A HOL Embedding of a Small Parallel HDL
نویسندگان
چکیده
This paper reports work-in-progress on the embedding of a small hardware description language in HOL. Our language is a subset of ADDL, a language used to write design speciications for the CAMAD synthesis tool developed in Linkk oping. Our intention is to mechanise transformational reasoning about ADDL programs as theorem-proving in HOL. Our work extends Camilleri and Melham's deep embedding of a WHILE-language and its evaluation semantics in HOL; the main extensions needed to model ADDL are multi-dimensional arrays and parallel composition of commands. It is important to include such features as they are used in practice with ADDL.
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